Saturday, August 9, 2014

Workshop on Analog and Digital IC Design using Cadence Tool - 6th Sep 2014


Workshop on VLSI Design using Cadence Design Suite

6th September, 2014

Organized by

School of Information Sciences (SOIS)

Manipal University


Overview of the Workshop



The aim of this workshop is to give an overview and hands-on experience to the participants on the state-of-the-art Cadence EDA tools for VLSI Design. This workshop comprises of theory along with the hands-on training on CMOS Analog and Digital Design. The participants will have an exposure to the Circuit Design & Simulation, Layout, Physical Verification (DRC, LVS), Extraction, with hands-on session on the Cadence design and simulation tools (NCSIM, RTLCompiler, Virtuoso, Spectre, etc.) and a real experience of using the standard cell design flow which is required for ASIC design.

This course will be useful for the engineers who are interested to learn industry standard tool techniques of Analog & Digital IC Design.

Who can attend?

Researchers, Academicians, UG & PG students in the area of Electronics & Communication, Electrical & Electronics, Instrumentation & Control and other relevant streams of Engineering.

Address for Correspondence:

The Workshop Coordinator,
SOIS, Lower Ground 2,
Academic Block 5, MIT Campus,
Manipal - 576104

Contact:

Madhushankara M, Assistant Professor,
Phone: 9449581104
workshop.sois@manipal.edu

Important Dates:


Last date for registration : 25th-Aug-2014
Workshop date : 06th-Sep-2014

Registration:

Fee: INR 1000

Maximum participants: 30 (FCFS basis)

The registration fee can be paid online or through a demand draft drawn in favour of Manipal University, payable at Manipal/Udupi.

For online payment:

Name    : Manipal University – Workshop
Address : Manipal University – Workshop,
                Finance Dept.
                Manipal University,
                Manipal - 576104

Designation  : Trust
Bank             : SBI
Branch          : Manipal
Branch Code : 04426

Account type & Number: SB #33508958510
                     IFSC Code: SBIN0004426
                    MICR Code: 576002006

About SOIS:

School of Information Sciences (SOIS), a constituent institute of Manipal University, is an industry driven state-of-the-art training institute of excellence in the field of Medical Software, Embedded Systems and VLSI Design, set up in the year 1998.

About VLSI Design Group:

Since its inception, the group has been continuously striving for excellence in VLSI Design and training with a mission of offering value based education. The group is working in close association with industry giants like Synopsys Inc, NXPSemiconductors, WhizChip, Manipal Dot Net and a Consortium of other VLSI Design industries for its Post Graduate courses. The department is equipped with the cutting edge tools from Cadence, Xilinx, Altera, DSP boards etc.


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