Attend a 2-day “Hands-on” Workshop on Digital Design using System Verilog - 19th & 20th Sep 2014

Workshop on Digital Design using System Verilog

 

19th and 20th September, 2014

Organized by

School of Information Sciences (SOIS)

Manipal University

 

Overview of the Workshop

 

The aim of this workshop is to give an overview and hands-on experience to the participants on the state-of-the-art tools for VLSI Design. This workshop comprises of theory along with the hands-on training on Digital Design. The participants will have an exposure to the Circuit Design & Simulation, Layout, Physical Verification, Extraction, with hands-on session on System Verilog.

 

 

This course will be useful for the engineers who are interested to learn industry standard tool techniques of Analog & Digital IC Design

 

Who can attend?

Researchers, Academicians, UG & PG students, anyone.

 

Resource Persons

Academic Experts from Manipal University.

 

Important Dates:

Last date for registration : 10th-Sep-2014
Workshop date : 19th and 20th Sep, 2014

 

 

About SOIS:

School of Information Sciences (SOIS), a constituent institute of Manipal University, is an industry driven state-of-the-art training institute of excellence in the field of Medical Software, Embedded Systems and VLSI Design, set up in the year 1998

About VLSI Design Group: 

Since its inception, the group has been continuously striving for excellence in VLSI Design and training with a mission of offering value based education. The group is working in close association with industry giants like Synopsys Inc, NXPSemiconductors, WhizChip, Manipal Dot Net and a Consortium of other VLSI Design industries for its Post Graduate courses. The department is equipped with the cutting edge tools from Cadence, Xilinx, Altera, DSP boards etc.