Shenoy's blog
Tuesday, October 25, 2016
Manipal University admissions 2017 - Master of Engineering (ME) program at School of Information Sciences
Wednesday, August 27, 2014
Attend a 2-day “Hands-on” Workshop on Digital Design using System Verilog - 19th & 20th Sep 2014
Workshop on Digital Design using System Verilog
19th and 20th September, 2014
Organized by
School of Information Sciences (SOIS)
Manipal University
Overview of the Workshop
The aim of this workshop is to give an overview and hands-on experience to the participants on the state-of-the-art tools for VLSI Design. This workshop comprises of theory along with the hands-on training on Digital Design. The participants will have an exposure to the Circuit Design & Simulation, Layout, Physical Verification, Extraction, with hands-on session on System Verilog.
This course will be useful for the engineers who are interested to learn industry standard tool techniques of Analog & Digital IC Design
Who can attend?
Researchers, Academicians, UG & PG students, anyone.
Resource Persons
Academic Experts from Manipal University.
Important Dates:
Last date for registration : 10th-Sep-2014
Workshop date : 19th and 20th Sep, 2014
Workshop date : 19th and 20th Sep, 2014
About SOIS:
School of Information Sciences (SOIS), a constituent
institute of Manipal University, is an industry driven state-of-the-art
training institute of excellence in the field of Medical Software,
Embedded Systems and VLSI Design, set up in the year 1998
About VLSI Design Group:
Since its inception, the group has been continuously
striving for excellence in VLSI Design and training with a mission of
offering value based education. The group is working in close
association with industry giants like Synopsys Inc, NXPSemiconductors,
WhizChip, Manipal Dot Net and a Consortium of other VLSI Design
industries for its Post Graduate courses. The department is equipped
with the cutting edge tools from Cadence, Xilinx, Altera, DSP boards
etc.
Labels:
2014,
Analog,
Circuit,
Digital,
FSM Design,
IC Design,
Manipal,
Manipal University,
MIT,
NCSIM,
RTL Compiler,
School of Information Sciences,
Simulation,
Spectre,
System Verilog,
Virtuoso,
VLSI Design,
Workshops
Monday, August 11, 2014
Attend a 2-day “Hands-on” Workshop on Raspberry Pi using Python - 5th & 6th Sep 2014
Application development on Raspberry Pi using Python
Objective
The aim of this workshop is to give an overview of Python and Python Socket programming with an introduction to ARM Processor Architecture. It also includes introduction to Raspberry Pi board Architecture and compiling and porting of OS for Raspberry Pi. Thus providing a complete hands-on experience of application development on Raspberry Pi board using Python.
Who can Attend
Researchers, Academicians, UG & PG students
in the area of Electronics & Communication,
Electrical & Electronics, Instrumentation & Control
and other relevant streams of Engineering.
Resource Persons
Academic Experts from Manipal University.
About SOIS:
School of Information Sciences (SOIS), a constituent institute of Manipal University, is an industry driven state-of-the-art training institute of excellence in the field of Medical Software, Embedded Systems and VLSI Design, set up in the year 1998.
School of Information Sciences (SOIS), a constituent institute of Manipal University, is an industry driven state-of-the-art training institute of excellence in the field of Medical Software, Embedded Systems and VLSI Design, set up in the year 1998.
Saturday, August 9, 2014
Workshop on Analog and Digital IC Design using Cadence Tool - 6th Sep 2014
Workshop on VLSI Design using Cadence Design Suite
6th September, 2014
Organized by
School of Information Sciences (SOIS)
Manipal University
Overview of the Workshop
The aim of this workshop is to give an overview and hands-on experience to the participants on the state-of-the-art Cadence EDA tools for VLSI Design. This workshop comprises of theory along with the hands-on training on CMOS Analog and Digital Design. The participants will have an exposure to the Circuit Design & Simulation, Layout, Physical Verification (DRC, LVS), Extraction, with hands-on session on the Cadence design and simulation tools (NCSIM, RTLCompiler, Virtuoso, Spectre, etc.) and a real experience of using the standard cell design flow which is required for ASIC design.
Who can attend?
Researchers, Academicians, UG & PG students in the area of Electronics & Communication, Electrical & Electronics, Instrumentation & Control and other relevant streams of Engineering.
Address for Correspondence:
The Workshop Coordinator,
SOIS, Lower Ground 2,
Academic Block 5, MIT Campus,
Manipal - 576104
SOIS, Lower Ground 2,
Academic Block 5, MIT Campus,
Manipal - 576104
Contact:
Madhushankara M, Assistant Professor,
Phone: 9449581104
workshop.sois@manipal.edu
Important Dates:
Last date for registration : 25th-Aug-2014
Workshop date : 06th-Sep-2014
Workshop date : 06th-Sep-2014
Registration:
Fee: INR 1000
Maximum participants: 30 (FCFS basis)
The registration fee can be paid online or through a demand draft drawn in favour of Manipal University, payable at Manipal/Udupi.
For online payment:
Name : Manipal University – Workshop
Address : Manipal University – Workshop,
Finance Dept.
Manipal University,
Manipal - 576104
Designation : Trust
Bank : SBI
Branch : Manipal
Branch Code : 04426
Account type & Number: SB #33508958510
IFSC Code: SBIN0004426
MICR Code: 576002006
About SOIS:
School of Information Sciences (SOIS), a constituent institute of Manipal University, is an industry driven state-of-the-art training institute of excellence in the field of Medical Software, Embedded Systems and VLSI Design, set up in the year 1998.
About VLSI Design Group:
Since its inception, the group has been continuously striving for excellence in VLSI Design and training with a mission of offering value based education. The group is working in close association with industry giants like Synopsys Inc, NXPSemiconductors, WhizChip, Manipal Dot Net and a Consortium of other VLSI Design industries for its Post Graduate courses. The department is equipped with the cutting edge tools from Cadence, Xilinx, Altera, DSP boards etc.
Labels:
Analog,
Cadence Tool,
Circuit,
CMOS,
Digital,
EDA tools,
IC Design,
Manipal,
Manipal University,
MIT,
NCSIM,
RTL Compiler,
School of Information Sciences,
Simulation,
Spectre,
Virtuoso,
VLSI Design,
Workshops 2014
ITK VTK Workshop 2014
Medical Image Processing Workshop - 2014
Using Open Source Platform - ITK and VTK
6th Sep 2014
Organized by "School of Information Sciences"
Objective of this Workshop
To provide hands-on experience on Medical Image Processing application using an opensource platform Insight Toolkit (ITK) and Visualization Toolkit (VTK)
Focus :
- Fundamentals of medical image processing
- Insight Toolkit
- Visualization Toolkit
Who can attend?
Researchers, Academicians, UG & PG students in the area of Biomedical Engineering, Medical Electronics, Medical Software, Computer Science, Electronics & Communication and other relevant streams.
Resource Persons:
Academic experts from Manipal University.
Registration:
Fee Rs. 1000
Maximum participants: 30
(First Come First Serve Basis)
Interested participants can register by sending an email to workshop.sois@manipal.edu
Venue:
SOIS, Lower Ground 2, Academic Block 5,
MIT Campus, Manipal,
Karnataka 576104
Contact:
Balaji B, Assistant Professor : 9964667208
Nandish S, Assistant Professor: 8105600172
Important Dates:
Last date for Registration : 25-08-2014
Workshop date : 06-09-2014
For online payment:
Name: Manipal University – Workshop
Address: Manipal University – Workshop,
Finance Dept. Manipal
University, Manipal - 576104
Bank: SBI Manipal
Account Number: 33508958510
IFSC Code: SBIN0004426
Sunday, September 29, 2013
Medical Image Processing Workshop using an open source platform - ITK and VTK (2013)
Medical Image Processing Workshop - 2013
Using Open Source Platform - ITK and VTK
25 and 26 Oct 2013
Organized by "School of Information Science"
and
BoP, Manipal
Objective of this Workshop
ITK Insight Toolkit and VTK Visualization Toolkit
Workshop accompanied by eminent resource persons from Industry, Hospital and Academia
Venue: School of Information Science, Manipal
Last date for Registration - 18th Oct 2013
Limited Seats on First Come First Serve basis
For Details Contact: Mr. Balaji - 09964667208
Mr. Nandish - 08105600172
Saturday, June 2, 2012
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